Motorola 56F8323 Hybrid Controller

The 56F8323, a member of the 56800E core-based family of Hybrid Controllers, combines the processing power of a DSP and the functionality of a microcontoller. Inside a compact 64-pin LQFP, this device features 60 MIPS perforamnce (at 60 MHz), along with 48 KB of on-chip Flash memory and a comprehensive set of peripehrals.  It extends the capabilities of the 56F8322 by adding additional analog-to-digital converter (ADC) inputs, and timer input/output pins, among other enhancements.

56F8323 Features

• On-chip memory includes high-speed volatile and nonvolatile components:
  • 32KB of Program Flash
  • 4 KB of Program RAM
  • 8 KB of Data Flash
  • 8 KB of Data RAM
  • 8 KB of Boot Flash
• Up to 60 MIPS at 60 MHz execution frequency
• DSP and MCU functionality in a unified, C-efficient architecture
• JTAG/EOnCE for unobtrusive, real-time debugging
• Four 36-bit accumulators
• 16- and 32-bit bidirectional barrel shifter
• Parallel instruction set with unique addressing modes
• Hardware DO and REP loops available
• Three internal address buses
• Four internal data buses
• Architectural support for 8-, 16- and 32-bit single-cycle data fetches
• MCU-style software stack support
• Controller-style addressing modes and instructions
• Single-cycle 16 x 16-bit parallel multiplier-accumulator (MAC)
• Proven to deliver more control functionality with a smaller memory footprint than competing architectures

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