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QPSK Demodulator

VHDL Design

from: VHDL Design Portfolio

QPSK demodulation

The QPSK Demodulator demodulates a quaternary phase shift keyed (QPSK) signal.  The input is a baseband representation of the modulated signal.

Decomposes the modulated input signal by using two fixed-frequency driven multipliers with outputs are 90° apart, producing values twice as fast a oscillator.  Two low-pass filters are also utilized, along with a parallel-to-serial converter which translates the dibits to bits, which are the PCM signal.

Alternative QPSK demodulator

Generates four modified carrier phases of 0°, 90°, 180°, and 270° (obtained in the modulator by rotating the angles of the QPSK constellation).  An XNOR operation is executed between each phase and if both coincide, the a modulated signal produces a logic "1".  If the received phase is 0° (related to dibit 00), all the XNORs are at logic "0." If the phase is 90° (dibit 10), the upper branch is a "1".  For 270° (dibit 01) an inversion is observed as logic "1" is produced at the lower branch. In the case of the phase being 180° (dibit 11), a logic "1" is observed on both branches, resulting in a demodulated PCM signal.

A phase-references generator can producee inputs to the XNOR gates.


Useful Wikipedia Definitions


QPSK Demodulator Is A Good Match For Low-Cost Modulator, Eduard Bertran, Electronic Design, April 14, 2003.
This demodulator is suitable for the quadrature phase-shift keying (QPSK) modulator previously .....


QPSK Demodulator Baseband, The Mathworks Inc.
The QPSK Demodulator Baseband block demodulates a signal that.....
Constellation ordering - Determines how the block....


Design and FPGA Implementation of an Adaptive Demodulator, Sandeep Mukthavaram, August 23, 1999, The University of Kansas.
Exploit re-configurability and parallelism offered by FPGAs to....
Design and FPGA Implementation of PSK and FSK demodulators.....


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